bmips: b53: enable bcm63268 internal PHYs
authorKyle Hendry <[email protected]>
Fri, 17 Jan 2025 20:18:20 +0000 (12:18 -0800)
committerÁlvaro Fernández Rojas <[email protected]>
Tue, 9 Dec 2025 14:12:43 +0000 (15:12 +0100)
On the smartrg sr505n the bootloader only sets registers to enable the
PHYs if it's interrupted. When Linux boots this results in a -EINVAL
error when trying to read from the EPHYs and the GPHY doesn't work.
This patch disables low power mode in the GPHY/EPHYs and properly resets
the EPHYs.

Signed-off-by: Kyle Hendry <[email protected]>
Link: https://github.com/openwrt/openwrt/pull/17648
Signed-off-by: Álvaro Fernández Rojas <[email protected]>
target/linux/bmips/dts/bcm6318.dtsi
target/linux/bmips/dts/bcm63268.dtsi
target/linux/bmips/dts/bcm6328.dtsi
target/linux/bmips/dts/bcm6362.dtsi
target/linux/bmips/dts/bcm6368.dtsi

index 03fb01bc047d18f3f407dfa57bf77142a7930b8f..3bd1eeae82fa357b274745ba8e1b602478073eda 100644 (file)
                                        pins = "gpio40";
                                };
                        };
+
+                       ephy_rst: reset-controller@3c {
+                               compatible = "brcm,bcm6345-reset";
+                               reg = <0x3c 0x4>;
+                               #reset-cells = <1>;
+                       };
                };
 
                uart0: serial@10000100 {
                        reg = <0x10080000 0x8000>;
                        big-endian;
 
+                       brcm,gpio-ctrl = <&gpio_cntl>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                phy1: ethernet-phy@1 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <1>;
+
+                                       resets = <&ephy_rst 0>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy2: ethernet-phy@2 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <2>;
+
+                                       resets = <&ephy_rst 1>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy3: ethernet-phy@3 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <3>;
+
+                                       resets = <&ephy_rst 2>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy4: ethernet-phy@4 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <4>;
+
+                                       resets = <&ephy_rst 3>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
                        };
 
index 5a8cb7193f913ff8973126c53268334932c4e402..1344be2e431c29d669e3b9d74414be75b4b76dd2 100644 (file)
                                        pins = "dsl_gpio9";
                                };
                        };
+
+                       ephy_rst: reset-controller@3c {
+                               compatible = "brcm,bcm6345-reset";
+                               reg = <0x3c 0x4>;
+                               #reset-cells = <1>;
+                       };
                };
 
                uart0: serial@10000180 {
                                 <&timer_clk BCM63268_TCLK_GPHY1>;
 
                        resets = <&periph_rst BCM63268_RST_ENETSW>,
-                                <&periph_rst BCM63268_RST_EPHY>,
-                                <&periph_rst BCM63268_RST_GPHY>;
+                                <&periph_rst BCM63268_RST_EPHY>;
 
                        power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_ROBOSW>;
 
                        reg = <0x10700000 0x8000>;
                        big-endian;
 
+                       brcm,gpio-ctrl = <&gpio_cntl>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                phy1: ethernet-phy@1 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <1>;
+
+                                       resets = <&ephy_rst 0>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy2: ethernet-phy@2 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <2>;
+
+                                       resets = <&ephy_rst 1>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy3: ethernet-phy@3 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <3>;
+
+                                       resets = <&ephy_rst 2>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy4: ethernet-phy@4 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <4>;
+
+                                       resets = <&periph_rst BCM63268_RST_GPHY>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
                        };
 
index 52f94950a3faf8293c62471f09bbf6396aab629a..6376bbb8d02fe8c0bce9e94f3c007282a80b5c18 100644 (file)
                                        pins = "usb_port1";
                                };
                        };
+
+                       ephy_rst: reset-controller@3c {
+                               compatible = "brcm,bcm6345-reset";
+                               reg = <0x3c 0x4>;
+                               #reset-cells = <1>;
+                       };
                };
 
                uart0: serial@10000100 {
                        reg = <0x10e00000 0x8000>;
                        big-endian;
 
+                       brcm,gpio-ctrl = <&gpio_cntl>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                phy1: ethernet-phy@1 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <1>;
+
+                                       resets = <&ephy_rst 0>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy2: ethernet-phy@2 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <2>;
+
+                                       resets = <&ephy_rst 1>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy3: ethernet-phy@3 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <3>;
+
+                                       resets = <&ephy_rst 2>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy4: ethernet-phy@4 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <4>;
+
+                                       resets = <&ephy_rst 3>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
                        };
 
index 5722f6e30c2ebf7e45397740fe95f4bbc665fd42..c73b278dc8557a0d90a511f5b090d6a62a2e6cc9 100644 (file)
                                        pins = "nand_grp";
                                };
                        };
+
+                       ephy_rst: reset-controller@3c {
+                               compatible = "brcm,bcm6345-reset";
+                               reg = <0x3c 0x4>;
+                               #reset-cells = <1>;
+                       };
                };
 
                uart0: serial@10000100 {
                        reg = <0x10e00000 0x8000>;
                        big-endian;
 
+                       brcm,gpio-ctrl = <&gpio_cntl>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                phy1: ethernet-phy@1 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <1>;
+
+                                       resets = <&ephy_rst 0>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy2: ethernet-phy@2 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <2>;
+
+                                       resets = <&ephy_rst 1>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy3: ethernet-phy@3 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <3>;
+
+                                       resets = <&ephy_rst 2>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy4: ethernet-phy@4 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <4>;
+
+                                       resets = <&ephy_rst 3>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
                        };
 
index a855ab340ac43be38ad0b9310cb621d993b14f9f..51a59cc8c09394181c264de0d5755d74975b1d79 100644 (file)
                                        pins = "uart1_grp";
                                };
                        };
+
+                       ephy_rst: reset-controller@3c {
+                               compatible = "brcm,bcm6345-reset";
+                               reg = <0x3c 0x4>;
+                               #reset-cells = <1>;
+                       };
                };
 
                leds: led-controller@100000d0 {
                        reg = <0x10f00000 0x8000>;
                        big-endian;
 
+                       brcm,gpio-ctrl = <&gpio_cntl>;
+
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;
                                phy1: ethernet-phy@1 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <1>;
+
+                                       resets = <&ephy_rst 6>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy2: ethernet-phy@2 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <2>;
+
+                                       resets = <&ephy_rst 7>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy3: ethernet-phy@3 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <3>;
+
+                                       resets = <&ephy_rst 8>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
 
                                phy4: ethernet-phy@4 {
                                        compatible = "ethernet-phy-ieee802.3-c22";
                                        reg = <4>;
+
+                                       resets = <&ephy_rst 9>;
+                                       reset-names = "phy";
+                                       reset-assert-us = <2000>;
+                                       reset-deassert-us = <2000>;
                                };
                        };